embassy_nrf/chips/
nrf52840.rs

1pub use nrf_pac as pac;
2
3/// The maximum buffer size that the EasyDMA can send/recv in one operation.
4pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
5pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
6
7pub const FLASH_SIZE: usize = 1024 * 1024;
8
9pub const RESET_PIN: u32 = 18;
10pub const APPROTECT_MIN_BUILD_CODE: u8 = b'F';
11
12embassy_hal_internal::peripherals! {
13    // USB
14    USBD,
15
16    // RTC
17    RTC0,
18    RTC1,
19    RTC2,
20
21    // WDT
22    WDT,
23
24    // NVMC
25    NVMC,
26
27    // RNG
28    RNG,
29
30    // QSPI
31    QSPI,
32
33    // QDEC
34    QDEC,
35
36    // UARTE
37    UARTE0,
38    UARTE1,
39
40    // SPI/TWI
41    TWISPI0,
42    TWISPI1,
43    SPI2,
44    SPI3,
45
46    // SAADC
47    SAADC,
48
49    // PWM
50    PWM0,
51    PWM1,
52    PWM2,
53    PWM3,
54
55    // TIMER
56    TIMER0,
57    TIMER1,
58    TIMER2,
59    TIMER3,
60    TIMER4,
61
62    // GPIOTE
63    GPIOTE_CH0,
64    GPIOTE_CH1,
65    GPIOTE_CH2,
66    GPIOTE_CH3,
67    GPIOTE_CH4,
68    GPIOTE_CH5,
69    GPIOTE_CH6,
70    GPIOTE_CH7,
71
72    // PPI
73    PPI_CH0,
74    PPI_CH1,
75    PPI_CH2,
76    PPI_CH3,
77    PPI_CH4,
78    PPI_CH5,
79    PPI_CH6,
80    PPI_CH7,
81    PPI_CH8,
82    PPI_CH9,
83    PPI_CH10,
84    PPI_CH11,
85    PPI_CH12,
86    PPI_CH13,
87    PPI_CH14,
88    PPI_CH15,
89    PPI_CH16,
90    PPI_CH17,
91    PPI_CH18,
92    PPI_CH19,
93    PPI_CH20,
94    PPI_CH21,
95    PPI_CH22,
96    PPI_CH23,
97    PPI_CH24,
98    PPI_CH25,
99    PPI_CH26,
100    PPI_CH27,
101    PPI_CH28,
102    PPI_CH29,
103    PPI_CH30,
104    PPI_CH31,
105
106    PPI_GROUP0,
107    PPI_GROUP1,
108    PPI_GROUP2,
109    PPI_GROUP3,
110    PPI_GROUP4,
111    PPI_GROUP5,
112
113    // GPIO port 0
114    P0_00,
115    P0_01,
116    P0_02,
117    P0_03,
118    P0_04,
119    P0_05,
120    P0_06,
121    P0_07,
122    P0_08,
123    #[cfg(feature = "nfc-pins-as-gpio")]
124    P0_09,
125    #[cfg(feature = "nfc-pins-as-gpio")]
126    P0_10,
127    P0_11,
128    P0_12,
129    P0_13,
130    P0_14,
131    P0_15,
132    P0_16,
133    P0_17,
134    #[cfg(feature="reset-pin-as-gpio")]
135    P0_18,
136    P0_19,
137    P0_20,
138    P0_21,
139    P0_22,
140    P0_23,
141    P0_24,
142    P0_25,
143    P0_26,
144    P0_27,
145    P0_28,
146    P0_29,
147    P0_30,
148    P0_31,
149
150    // GPIO port 1
151    P1_00,
152    P1_01,
153    P1_02,
154    P1_03,
155    P1_04,
156    P1_05,
157    P1_06,
158    P1_07,
159    P1_08,
160    P1_09,
161    P1_10,
162    P1_11,
163    P1_12,
164    P1_13,
165    P1_14,
166    P1_15,
167
168    // TEMP
169    TEMP,
170
171    // PDM
172    PDM,
173
174    // I2S
175    I2S,
176
177    // Radio
178    RADIO,
179
180    // EGU
181    EGU0,
182    EGU1,
183    EGU2,
184    EGU3,
185    EGU4,
186    EGU5,
187
188    // NFC
189    NFCT,
190}
191
192impl_usb!(USBD, USBD, USBD);
193
194impl_uarte!(UARTE0, UARTE0, UARTE0);
195impl_uarte!(UARTE1, UARTE1, UARTE1);
196
197impl_spim!(TWISPI0, SPIM0, TWISPI0);
198impl_spim!(TWISPI1, SPIM1, TWISPI1);
199impl_spim!(SPI2, SPIM2, SPI2);
200impl_spim!(SPI3, SPIM3, SPIM3);
201
202impl_spis!(TWISPI0, SPIS0, TWISPI0);
203impl_spis!(TWISPI1, SPIS1, TWISPI1);
204impl_spis!(SPI2, SPIS2, SPI2);
205
206impl_twim!(TWISPI0, TWIM0, TWISPI0);
207impl_twim!(TWISPI1, TWIM1, TWISPI1);
208
209impl_twis!(TWISPI0, TWIS0, TWISPI0);
210impl_twis!(TWISPI1, TWIS1, TWISPI1);
211
212impl_pwm!(PWM0, PWM0, PWM0);
213impl_pwm!(PWM1, PWM1, PWM1);
214impl_pwm!(PWM2, PWM2, PWM2);
215impl_pwm!(PWM3, PWM3, PWM3);
216
217impl_timer!(TIMER0, TIMER0, TIMER0);
218impl_timer!(TIMER1, TIMER1, TIMER1);
219impl_timer!(TIMER2, TIMER2, TIMER2);
220impl_timer!(TIMER3, TIMER3, TIMER3, extended);
221impl_timer!(TIMER4, TIMER4, TIMER4, extended);
222
223impl_qspi!(QSPI, QSPI, QSPI);
224
225impl_pdm!(PDM, PDM, PDM);
226
227impl_qdec!(QDEC, QDEC, QDEC);
228
229impl_rng!(RNG, RNG, RNG);
230
231impl_pin!(P0_00, 0, 0);
232impl_pin!(P0_01, 0, 1);
233impl_pin!(P0_02, 0, 2);
234impl_pin!(P0_03, 0, 3);
235impl_pin!(P0_04, 0, 4);
236impl_pin!(P0_05, 0, 5);
237impl_pin!(P0_06, 0, 6);
238impl_pin!(P0_07, 0, 7);
239impl_pin!(P0_08, 0, 8);
240#[cfg(feature = "nfc-pins-as-gpio")]
241impl_pin!(P0_09, 0, 9);
242#[cfg(feature = "nfc-pins-as-gpio")]
243impl_pin!(P0_10, 0, 10);
244impl_pin!(P0_11, 0, 11);
245impl_pin!(P0_12, 0, 12);
246impl_pin!(P0_13, 0, 13);
247impl_pin!(P0_14, 0, 14);
248impl_pin!(P0_15, 0, 15);
249impl_pin!(P0_16, 0, 16);
250impl_pin!(P0_17, 0, 17);
251#[cfg(feature = "reset-pin-as-gpio")]
252impl_pin!(P0_18, 0, 18);
253impl_pin!(P0_19, 0, 19);
254impl_pin!(P0_20, 0, 20);
255impl_pin!(P0_21, 0, 21);
256impl_pin!(P0_22, 0, 22);
257impl_pin!(P0_23, 0, 23);
258impl_pin!(P0_24, 0, 24);
259impl_pin!(P0_25, 0, 25);
260impl_pin!(P0_26, 0, 26);
261impl_pin!(P0_27, 0, 27);
262impl_pin!(P0_28, 0, 28);
263impl_pin!(P0_29, 0, 29);
264impl_pin!(P0_30, 0, 30);
265impl_pin!(P0_31, 0, 31);
266
267impl_pin!(P1_00, 1, 0);
268impl_pin!(P1_01, 1, 1);
269impl_pin!(P1_02, 1, 2);
270impl_pin!(P1_03, 1, 3);
271impl_pin!(P1_04, 1, 4);
272impl_pin!(P1_05, 1, 5);
273impl_pin!(P1_06, 1, 6);
274impl_pin!(P1_07, 1, 7);
275impl_pin!(P1_08, 1, 8);
276impl_pin!(P1_09, 1, 9);
277impl_pin!(P1_10, 1, 10);
278impl_pin!(P1_11, 1, 11);
279impl_pin!(P1_12, 1, 12);
280impl_pin!(P1_13, 1, 13);
281impl_pin!(P1_14, 1, 14);
282impl_pin!(P1_15, 1, 15);
283
284impl_ppi_channel!(PPI_CH0, 0 => configurable);
285impl_ppi_channel!(PPI_CH1, 1 => configurable);
286impl_ppi_channel!(PPI_CH2, 2 => configurable);
287impl_ppi_channel!(PPI_CH3, 3 => configurable);
288impl_ppi_channel!(PPI_CH4, 4 => configurable);
289impl_ppi_channel!(PPI_CH5, 5 => configurable);
290impl_ppi_channel!(PPI_CH6, 6 => configurable);
291impl_ppi_channel!(PPI_CH7, 7 => configurable);
292impl_ppi_channel!(PPI_CH8, 8 => configurable);
293impl_ppi_channel!(PPI_CH9, 9 => configurable);
294impl_ppi_channel!(PPI_CH10, 10 => configurable);
295impl_ppi_channel!(PPI_CH11, 11 => configurable);
296impl_ppi_channel!(PPI_CH12, 12 => configurable);
297impl_ppi_channel!(PPI_CH13, 13 => configurable);
298impl_ppi_channel!(PPI_CH14, 14 => configurable);
299impl_ppi_channel!(PPI_CH15, 15 => configurable);
300impl_ppi_channel!(PPI_CH16, 16 => configurable);
301impl_ppi_channel!(PPI_CH17, 17 => configurable);
302impl_ppi_channel!(PPI_CH18, 18 => configurable);
303impl_ppi_channel!(PPI_CH19, 19 => configurable);
304impl_ppi_channel!(PPI_CH20, 20 => static);
305impl_ppi_channel!(PPI_CH21, 21 => static);
306impl_ppi_channel!(PPI_CH22, 22 => static);
307impl_ppi_channel!(PPI_CH23, 23 => static);
308impl_ppi_channel!(PPI_CH24, 24 => static);
309impl_ppi_channel!(PPI_CH25, 25 => static);
310impl_ppi_channel!(PPI_CH26, 26 => static);
311impl_ppi_channel!(PPI_CH27, 27 => static);
312impl_ppi_channel!(PPI_CH28, 28 => static);
313impl_ppi_channel!(PPI_CH29, 29 => static);
314impl_ppi_channel!(PPI_CH30, 30 => static);
315impl_ppi_channel!(PPI_CH31, 31 => static);
316
317impl_saadc_input!(P0_02, ANALOG_INPUT0);
318impl_saadc_input!(P0_03, ANALOG_INPUT1);
319impl_saadc_input!(P0_04, ANALOG_INPUT2);
320impl_saadc_input!(P0_05, ANALOG_INPUT3);
321impl_saadc_input!(P0_28, ANALOG_INPUT4);
322impl_saadc_input!(P0_29, ANALOG_INPUT5);
323impl_saadc_input!(P0_30, ANALOG_INPUT6);
324impl_saadc_input!(P0_31, ANALOG_INPUT7);
325
326impl_i2s!(I2S, I2S, I2S);
327
328impl_radio!(RADIO, RADIO, RADIO);
329
330impl_egu!(EGU0, EGU0, EGU0_SWI0);
331impl_egu!(EGU1, EGU1, EGU1_SWI1);
332impl_egu!(EGU2, EGU2, EGU2_SWI2);
333impl_egu!(EGU3, EGU3, EGU3_SWI3);
334impl_egu!(EGU4, EGU4, EGU4_SWI4);
335impl_egu!(EGU5, EGU5, EGU5_SWI5);
336
337embassy_hal_internal::interrupt_mod!(
338    CLOCK_POWER,
339    RADIO,
340    UARTE0,
341    TWISPI0,
342    TWISPI1,
343    NFCT,
344    GPIOTE,
345    SAADC,
346    TIMER0,
347    TIMER1,
348    TIMER2,
349    RTC0,
350    TEMP,
351    RNG,
352    ECB,
353    AAR_CCM,
354    WDT,
355    RTC1,
356    QDEC,
357    COMP_LPCOMP,
358    EGU0_SWI0,
359    EGU1_SWI1,
360    EGU2_SWI2,
361    EGU3_SWI3,
362    EGU4_SWI4,
363    EGU5_SWI5,
364    TIMER3,
365    TIMER4,
366    PWM0,
367    PDM,
368    MWU,
369    PWM1,
370    PWM2,
371    SPI2,
372    RTC2,
373    I2S,
374    FPU,
375    USBD,
376    UARTE1,
377    QSPI,
378    CRYPTOCELL,
379    PWM3,
380    SPIM3,
381);
embassy_nrf/chips/nrf52840.rs

embassy_nrf/chips/
nrf52840.rs
